About the approximate equation about the chip area?

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Thomson

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chip die area

hi,
does anybody have an approximate equation describing the chip/die area depending on the gate counts and ssrams or other compiled macros to estimate the die area (without IO pad) since this gross estimation will help me to decide whether the chip is pad limited or core limited.

Thanks in advance,

Thomson
 

You report the area of all modules and try Weighted Mean equation.
i tried for many chips . but it is ~90% of actual chip area.
 

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