pseudockb
Member level 5
Hi, I am now having my first tapeout and I would like to know what are the typical sets of corner simulations that designers run in the industry? From what I know, there are typical,fast and slow PMOS and NMOS models; high, typical and low R and C; and high, typical and low temp and Vdd. If we were to run all the possible combinations, that would mean 729 of combinations. So do we actually need to satisfy all the possible combinations to check the robustness of the circuit? I heard from some of the experienced designers that the worst case condition (SS, high temp and low vdd), the typical condition and the best condition(FF, low temp and high vdd) are sufficient enough to test the robustness of the circuits. What are your thoughts? Thanks.