Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

a truth table question (use output as one of the input for a gate)

Status
Not open for further replies.

bhl3302

Full Member level 6
Joined
Sep 30, 2008
Messages
351
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,296
Activity points
4,960
For example, if we have a OR gate, one input depends on us and the other input is like the feedback from the output, how can we generate the truth table? Thank you!
 

dhaval4987

Full Member level 3
Joined
Oct 17, 2009
Messages
162
Helped
12
Reputation
24
Reaction score
12
Trophy points
1,298
Location
AZ
Activity points
2,324
If it starts from initial state and say Controlled input is 0= then output will be latched to 0. Because the controlled input is 0 and the fed back value is also 0. There is no way the fed back value could be set to 1 without changing the controlled input.

Once you set control input to 1- no matter what the feedback it- it will latch to 1 for ever.

Are you looking to make a latch?
 

bhl3302

Full Member level 6
Joined
Sep 30, 2008
Messages
351
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,296
Activity points
4,960
Hi dhaval4987, thank you for your explanation! I am just doing some execises and found this problem. So it means we can write down the truth table like this:
Input Output(also the other input)'
0 0
1 1
Is it correct? Becasue I am thinking about that if the input is 0, the output can be 1 because 0(OR)1=1, should I write the truth table as
Input Output(also the other input)'
0 0
0 1
1 1
? Please advise!
If it starts from initial state and say Controlled input is 0= then output will be latched to 0. Because the controlled input is 0 and the fed back value is also 0. There is no way the fed back value could be set to 1 without changing the controlled input.

Once you set control input to 1- no matter what the feedback it- it will latch to 1 for ever.

Are you looking to make a latch?
 

dhaval4987

Full Member level 3
Joined
Oct 17, 2009
Messages
162
Helped
12
Reputation
24
Reaction score
12
Trophy points
1,298
Location
AZ
Activity points
2,324
Controlled Fed back Out
0 0 0
0 1 1 : This case is invalid in the beginning when Controlled lines do not change. Coz how will output change if Controlled input is 0!? Do you get what I mean?
Once the controlled input is set to 1 then output will be 1 for rest of the cases, even if you switch the controlled line to 0. (The case above becomes realistic).
 

bhl3302

Full Member level 6
Joined
Sep 30, 2008
Messages
351
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,296
Activity points
4,960
Hi Andre,thank you for your reply! But I am still not sure from your statement, whenY=1, US=1, why OUT=X? This is an OR gate and Y equals to OUT, could you give me some more guidance?

According dhaval analysis ( If I´m no wrong ).

+++
 

dhaval4987

Full Member level 3
Joined
Oct 17, 2009
Messages
162
Helped
12
Reputation
24
Reaction score
12
Trophy points
1,298
Location
AZ
Activity points
2,324
yes andre is correct... this is sequential design and cant be explained by combinational approach.
 

bhl3302

Full Member level 6
Joined
Sep 30, 2008
Messages
351
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,296
Activity points
4,960
Yes I got you! So I should make a statement to say that once Controlled is 1, the output will be 1 and even if Controlled changed back to 0, the output is still 1, am I right?

Controlled Fed back Out
0 0 0
0 1 1 : This case is invalid in the beginning when Controlled lines do not change. Coz how will output change if Controlled input is 0!? Do you get what I mean?
Once the controlled input is set to 1 then output will be 1 for rest of the cases, even if you switch the controlled line to 0. (The case above becomes realistic).
 

dhaval4987

Full Member level 3
Joined
Oct 17, 2009
Messages
162
Helped
12
Reputation
24
Reaction score
12
Trophy points
1,298
Location
AZ
Activity points
2,324
yes. you are. are you trying to design an latch or FF???
 

bhl3302

Full Member level 6
Joined
Sep 30, 2008
Messages
351
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,296
Activity points
4,960
OK I got Andre too. So for sequential design how can we write the truth table?
yes andre is correct... this is sequential design and cant be explained by combinational approach.


---------- Post added at 01:23 ---------- Previous post was at 01:20 ----------

Not a exact design, actualluy I am doing a problem of a book and found this interesting.
yes. you are. are you trying to design an latch or FF???
 

dhaval4987

Full Member level 3
Joined
Oct 17, 2009
Messages
162
Helped
12
Reputation
24
Reaction score
12
Trophy points
1,298
Location
AZ
Activity points
2,324
Output depends on Previous State and Present Input. you can find about it in almost all basic books or on google. pretty easy to understand.
 

bhl3302

Full Member level 6
Joined
Sep 30, 2008
Messages
351
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,296
Activity points
4,960
Sorry Andre I am still a little bit confused. Could you tell me more about this?
Y US OUT
1 1 x
1 0 1
From here you said even if there is a wire (or connection) between the output and Y, it is still possibel that Y=1. US=1 and OUT=0 because it is latched?
Not in time domain, because is latched.

+++


---------- Post added at 01:35 ---------- Previous post was at 01:31 ----------

Yes I know this. So you are saying that now the truth table should be written according to time but not combination? If it is true, could you tell me how?

Output depends on Previous State and Present Input. you can find about it in almost all basic books or on google. pretty easy to understand.
 

dhaval4987

Full Member level 3
Joined
Oct 17, 2009
Messages
162
Helped
12
Reputation
24
Reaction score
12
Trophy points
1,298
Location
AZ
Activity points
2,324
you can read the truth table like this:

If the Previous State was X and the Present Input is Y then Next State becomes Z.

For the next entry in Truth Table- you should use Z as 'Previous State'.

I hope this helps.
 

andre_teprom

Super Moderator
Staff member
Joined
Nov 7, 2006
Messages
9,222
Helped
1,147
Reputation
2,313
Reaction score
1,124
Trophy points
1,403
Location
Brazil
Activity points
53,688
Maybe a better way to analyse be not by truth table, but with state machine.
If I´m not wrong, that´s the behaviour using a D flip-flop :

state.JPG


Wich confirms a infinite loop after certain state, like predicted by dhaval.

+++
 
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top