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The op is connected as the figure. When the capacitor is charged and discharged there is an overshoot at the capacitor.
The op's phase magin is about 90 and when I only connect the op as unity gain buffer with the same cap load and input the step as simulus at the Vin+, there is no overshoot at the step response. So the op is stable.
Now I am confused, the op is stable why does the overshoot comes out in this case. I guess the cap is charged very quickly and faster than the op respone time, so the overshoot comes out. If it is so, how can we solve it. Please give me intruction, thank you all.