mike_bihan
Full Member level 3

cmos vt
It may be too simple,even naive. However, many of my colleague can not explain it for me.
The story is the if we connect a nmos in such way:
Drain=8v
Source=1.8v
Gate=1.8v
Bulk=0v
Will there be current ?
According Vgs>Vt formula, we will got answer "No". Simulation of Hspice agrees with this idea.
However, in almost all books, the formation of channel is discussed under the assumption that
the source are connected to the ground. Then Vgs equals to Vgb actually.
When Vs does not equal to Vbulk, it is described as body effect. The complex formula does not give
direct impact on the results.
If we analyze the problem in another way: The potential difference between the gate and the substrate will
cause concentration of the electron underneath the gate-poly. Why the inversion layer conduct current?
One of my possible explanation is that the voltage on the source and drain node are even higher than
gate-poly, therefore the electron will concentrate much more on the diffusion area, therefore the channel is
greatly weak. In other words, that the electron were pulled to the higher potential area: the drain and source.
Is that correct?
I am not good in Device Physics very much, thanks!
It may be too simple,even naive. However, many of my colleague can not explain it for me.
The story is the if we connect a nmos in such way:
Drain=8v
Source=1.8v
Gate=1.8v
Bulk=0v
Will there be current ?
According Vgs>Vt formula, we will got answer "No". Simulation of Hspice agrees with this idea.
However, in almost all books, the formation of channel is discussed under the assumption that
the source are connected to the ground. Then Vgs equals to Vgb actually.
When Vs does not equal to Vbulk, it is described as body effect. The complex formula does not give
direct impact on the results.
If we analyze the problem in another way: The potential difference between the gate and the substrate will
cause concentration of the electron underneath the gate-poly. Why the inversion layer conduct current?
One of my possible explanation is that the voltage on the source and drain node are even higher than
gate-poly, therefore the electron will concentrate much more on the diffusion area, therefore the channel is
greatly weak. In other words, that the electron were pulled to the higher potential area: the drain and source.
Is that correct?
I am not good in Device Physics very much, thanks!