5V input with 3.3V MOS

[okguy]

site:www.edaboard.com 3.3v 5v

Who can refer papers or tutorials on regulator, LDO or DC-DC, with 5V input, designed in a process with only 3.3V MOS and low voltage MOS (1.8 or 1.2V) ?

Thanks,
OkGuy

 

[Areky_qin]

mosfet 3.3v

use large Length transistors, and use stack structure.

 

[darkk]

Vgs matters: make the source voltage to follow the gate voltage. Check high voltage charge-pump circuit.

 

[panyi]

Hi, I have experience about your question.
You should avoid making Vgs Vgd > 3.3v first.
If Vds > 3.3v, the L shoud be longer than min rule, three times is enough,because of hot carrier effect.
But power down is problem, It's hard to power down without any current because of reliability issue.

 

[rocky_]

HI,everyone!!!!!!
exclude panyi's methods,how can we design this circuit? such as from changing circuit structure?
who can give me a device??? thanks

 

[dick_freebird]

The input node connects to a pass-gate NMOS with G=v3p3,
S=in, D=inverter_input. When the input exceeds the logic rail
it is cut off from further charging (a small bleed may be a
good idea). Great place to put your input pullup resistor
if you need one.