This is my second ever post here. I have been a lurker for quite some time and love coming here now and then.
Well I am struggling with a 2-stage amplifier design.
I am designing a 2-stage, nmos input pair folded cascode amplifier. I am happy with DC gain, GBW, quiescent current, etc except for the Systematic offset. And I do not know where it's coming from. I have Johns Martin book and read through the section on systematic offsets but no avail.
The second stage gain device is a 3V nmos and i even replaced with 1V nmos device. The systematic offset (30mV) didn't go away.
Can you help? Maybe there is obvious fact I am missing or maybe there is something subtle going on. Thanks a lot,
I see SOLVED mark so I assume that You found difference dimensions of your input pair mosfets? You have also unbalanced output stage and first stage which can produce additional offset.