yolande_yj
Full Member level 3

13.56mhz power amplifier
I found an application note from MicroChip about a 13.56MHz RFID reader reference design. I attached the schematic here. I have some questions:...
For the power amplifier, how to design the matching network? how to decide the component value?
In this PA design, the value of RF chock L1 is not large (0.47 uH), actually it has the same value as L2. Why? Also, C9, C10 and C31 are connected in parallel, why is that? To my understanding, several caps connected in parallel is to provide a wide bandwidth low impedance signal path, small cap has higher self resonance frequence (SRF). But I don't think the SRF of capacitor in pF range has effect at 13.56MHz, why are they connecting caps like that?
I can download the Spice model of the power MOSFET IRL510 from International Rectifier and import it to ADS, but how to design the PA using this model and end up with this design? Should I start with simulating the load pull contour?
Thank you.
I found an application note from MicroChip about a 13.56MHz RFID reader reference design. I attached the schematic here. I have some questions:...
For the power amplifier, how to design the matching network? how to decide the component value?
In this PA design, the value of RF chock L1 is not large (0.47 uH), actually it has the same value as L2. Why? Also, C9, C10 and C31 are connected in parallel, why is that? To my understanding, several caps connected in parallel is to provide a wide bandwidth low impedance signal path, small cap has higher self resonance frequence (SRF). But I don't think the SRF of capacitor in pF range has effect at 13.56MHz, why are they connecting caps like that?
I can download the Spice model of the power MOSFET IRL510 from International Rectifier and import it to ADS, but how to design the PA using this model and end up with this design? Should I start with simulating the load pull contour?
Thank you.