Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Mixed design, digital part

Status
Not open for further replies.
bibo1978

bibo1978

Full Member level 4
Joined
May 1, 2004
Messages
210
Helped
12
Reputation
24
Reaction score
6
Trophy points
1,298
Activity points
2,548
Is there some clear guidelines for mixed design digital part:
1- Floorplanning
2- PowerSupply design, precaution, techniques to avoid loading impact from analog part on the digital part.
3- shielding and noise avoidance "decreasing" techniques
4- clock and reset tree layout precautions and tips for digital part in mixed design
any extra guidelines, precautions, in layout, grounding, area saving in mixed design.
 

The answers are embedded in a few books.

Try the Mixed signal CMOS book by Baker for a general overview.

'The Art of Analog Layout' by Alan Hastings for layout guidelines

Another good book is "High Speed Signal Propagation: Advanced Black Magic" by Johnson and Graham

Try searching for the word 'SoC design' on Google. This is where all these issues lead to.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top