AbinayaSivam
Member level 1
Quartus Cyclone V:How to create a trigger signal for 128 bits counter data ?
Hi,
Working in Altera Quartus. Can anyone share the logic for how to create a verilog/VHDL code for generating a trigger signal like pulse signal, etc for 128 bits counter data.
Hi,
Working in Altera Quartus. Can anyone share the logic for how to create a verilog/VHDL code for generating a trigger signal like pulse signal, etc for 128 bits counter data.