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  1. #1
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    SRAM design issues with the W/L ratio and weak pull-up transistor

    Hi,

    I face some problems in designing a full CMOS SRAM cell:

    1. The choose of W/L ratio
    The W/L of the back-to-back inverters should be the same? I saw this in somewhere. I was confuse by that because in a latch, the forward inverter should be stronger than the feedback inverter...
    The Wordline transistor should have smaller W/L compare to back-to-back inverter?
    How bout the Bitline transistor?

    2. Why there is a need of weak pull-up transistor?

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  2. #2
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    Re: SRAM Design problem

    Try google.com.
    Type "SRAM static noise"



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  3. #3
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  4. #4
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    Re: SRAM Design problem

    refer to digital integrated circuits by jan rabey



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