player80
Full Member level 2
I'm trying to implement an SPI slave and I'm experiencing some issues with the ICE40up that the whole design seems to be stuck if I stop sending data from the SPI master.
I do not see any issues in the simulation.
The SPI clock is more or less a gated clock from the master (asic), and enters a gbuf input could that be a problem?
I do not see any issues in the simulation.
The SPI clock is more or less a gated clock from the master (asic), and enters a gbuf input could that be a problem?