ajaychowdharykr
Newbie level 3
Hi All,
I am designing Split DAC for 14-bit SAR ADC. I wanted to analyze the effect of Mismatch and process variation of the capacitor on the overall SAR ADC. For that, I wanted to run a Monte Carlo simulation on the DAC unit and I am using UMC 180nm Technology. However, I am not getting the Monte Carlo model file for MIM Cap in my PDK. If anyone can help me, it would be appreciable.
Till I am not getting the required model file, I want to write a Monte Carlo model file for MIM cap by my own, just to get a feeling of the effect of Mismatch and process variation on the performance of overall SAR ADC. I want to write this model file and simulate it in cadence. How should I proceed? Please help.
I am designing Split DAC for 14-bit SAR ADC. I wanted to analyze the effect of Mismatch and process variation of the capacitor on the overall SAR ADC. For that, I wanted to run a Monte Carlo simulation on the DAC unit and I am using UMC 180nm Technology. However, I am not getting the Monte Carlo model file for MIM Cap in my PDK. If anyone can help me, it would be appreciable.
Till I am not getting the required model file, I want to write a Monte Carlo model file for MIM cap by my own, just to get a feeling of the effect of Mismatch and process variation on the performance of overall SAR ADC. I want to write this model file and simulate it in cadence. How should I proceed? Please help.