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SiGe HBT Layout with CBEBC Structure

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Puppet123

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I am new to SiGe HBT layout.

I am using a CBEBC transistor layout - that is, two collectors and two bases.

I attached a picture.

My question is: how do I lay this out - do I connect the bases and collectors in a kind of "fishbone" connection ? I attached what I assume to be a correct way to do the lay out of the individual transistor. Is what I attached a correct method for CBEBC layout ?

Does anyone have any books, papers, thesis or could someone provide a screen capture/screen shot of how to connect/layout the individual transistor with the CBEBC structure to see if I am on track ?

Thank you.
 

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  • SiGeHBT.png
    SiGeHBT.png
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  • SiGeHBT2.png
    SiGeHBT2.png
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Last edited:

The right hand figure looks normal but since you are using
SiGe I'd assume you care a lot about capacitances (fmax
degrades as soon as you hook it up) and that Cjc is your
big issue. So, I would route B orthogonal to the C and E
combs (thinking here about larger, multi-segment layouts;
small signal single devices are only the beginning) and drop
down to the B contacts from above.
 

Hello Mr. Freebird,

Thanks for your response.

I just cannot picture what you are talking about.

Is there any way you could provide a screen shot or picture or modify the picture I sent (the right hand side one) ?

Or if you could direct me to a resource that has a visualization of this ?

Thank you.

I can also try to modify the picture if that would help visualize what you are suggesting.
 

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