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Bandgap voltage reference and voltage level issue

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Hi mohmohcha. Thank you again for your time.

You are right when you say that the start-up circuti is not normal, and it is not. I was only trying some stuffs when I came up with this curious problem. I have already described in the post before.

Everything is fine with my current reference, as I said before too. I managed to put my reference working properly with the appropriate start-up circuit (but now I am facing another problem that has to do with resistors because of the process variation - but I'll create another post for that).

Thank you again for your effort on helping.
 

Hi guys,

I forgot to ask something.

I am using a capacitor in the bandgap output in order to filter that voltage and to improve PSRR as well to avoid kickback from the next stage.

I wonder if there is any problem to use a MOSCAP instead of a MOM or MIM cap at that point. There is any problem with that?
 

MOS caps excel at density. They are good for bulk filtering.

You would want to be sure that the applied terminal voltage
can never, ever get below or close to VT of the FET (which
in a good analog MOS cap would be impossible, those are
built as high-negative-threshold depletion mode for linearity).
If you only have standard NMOS and PMOS FETs to use,
beware the C-V swing (which might give you an amp whose
compensation fails at large signal transients, or some such).

Also check that gate resistance and "channel" (bottom plate)
resistance are modeled as well as you'd like, this is a big deal
for HF effectiveness but something that, back in the sub-MHz
40V analog day, we tended to not care so much about.

You might find that a hybrid (MOS cap for low frequency bulk,
plus a MIM or MOM for high frequency, gives a best result.
Just like you put a little ceramic in parallel with your tantalums.
 

I see. I have already simulated the bgvr with the MOSCAP. That MOSCAP has 100pF and the minimum capacitance that he has at ~0V is around 50pF, that is, half of the value. I don't know if it was this that you were trying to explain. The system was stable in all corners. Max settling time around 15uS, typical settling around 4uS and minimum around 1uS. PM varied between 45º and 70º.

If I was to use a MOM or a MIM (maybe better to put at the top of the BGVR zone) how much should I go? Taking into account that it would be placed in parallel with the 100pF MOSCAP.

regards.
 

You might consider making your MIM/MOM opportunistic,
like routing your output deliberately under the ground
bus and using MIM structures to do it ( MIM top plate
is often uppermost thick metal, so good for ground).
 

Hi mohmohcha.

I forgot to ask you something. If the circuit is stable (doing the STB analysis, for example), say with 60º PM and a suitable GM, can I ignore the compensation capacitor?
 

By the way, can any one tell me why we need the C2 in this circuit (banba's):

1111111111111.png

- - - Updated - - -

EDIT: I meant C1.
 

Yes, but why we need C1? C2 isn't enough? Can you explain?

By the way, I have a overshoot in the output voltage reference. (transient respose) However, I have added a capacitor from VREF to GND and the spike has gone. It is suppose to have that?

- - - Updated - - -

I forgot to post my result:

vbgp.png

Is this result normal? I have that overshoot, as I have referred before. I don't know if it is supposed to have this spike.

This time I tried without the output capacitor that I have added. Instead I used the banba's capacitor recomendation.

Please I would appreciate your comments.

Regards.
 

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