jinruan
Junior Member level 3
max_transition
hi guys
When i run DC for syn, there are some max_transition and max_capacitance violations, what to do to fix this violations? thanks in advance!
max_transition
Required Actual
Pin Transition Transition Slack
-----------------------------------------------------------------
SYNU0/U4/U3/B 4.50 64.00 -59.50 (VIOLATED)
SYNU0/U4/uart_clk_o_reg/Q
4.50 64.00 -59.50 (VIOLATED)
SYNU0/U4/uart_clk_t_reg/D
4.50 64.00 -59.50 (VIOLATED)
SYNU0/U0/data_debug_reg[0]/SN
4.50 5.01 -0.51 (VIOLATED)
SYNU0/U0/data_debug_reg[1]/SN
4.50 5.01 -0.51 (VIOLATED)
SYNU0/U0/data_debug_reg[2]/SN
4.50 5.01 -0.51 (VIOLATED)
SYNU0/U0/data_debug_reg[3]/SN
4.50 5.01 -0.51 (VIOLATED)
SYNU0/U0/data_debug_reg[4]/SN
4.50 5.01 -0.51 (VIOLATED)
.....
max_capacitance
Required Actual
Pin Capacitance Capacitance Slack
-----------------------------------------------------------------
SYNU0/U4/uart_clk_o_reg/Q
0.31 4.45 -4.13 (VIOLATED)
SYNU0/U4/U8/Y 2.50 2.74 -0.25 (VIOLATED)
note:
1. the default_max_transition in technology lib is 4.5 .
2. the default_fanout_load is 1.0
3. during my syn. script, i set the load and drive as belows(no define for max_transition):
set_load 1.0 all_outputs()
set_drive 1.0 all_inputs()
hi guys
When i run DC for syn, there are some max_transition and max_capacitance violations, what to do to fix this violations? thanks in advance!
max_transition
Required Actual
Pin Transition Transition Slack
-----------------------------------------------------------------
SYNU0/U4/U3/B 4.50 64.00 -59.50 (VIOLATED)
SYNU0/U4/uart_clk_o_reg/Q
4.50 64.00 -59.50 (VIOLATED)
SYNU0/U4/uart_clk_t_reg/D
4.50 64.00 -59.50 (VIOLATED)
SYNU0/U0/data_debug_reg[0]/SN
4.50 5.01 -0.51 (VIOLATED)
SYNU0/U0/data_debug_reg[1]/SN
4.50 5.01 -0.51 (VIOLATED)
SYNU0/U0/data_debug_reg[2]/SN
4.50 5.01 -0.51 (VIOLATED)
SYNU0/U0/data_debug_reg[3]/SN
4.50 5.01 -0.51 (VIOLATED)
SYNU0/U0/data_debug_reg[4]/SN
4.50 5.01 -0.51 (VIOLATED)
.....
max_capacitance
Required Actual
Pin Capacitance Capacitance Slack
-----------------------------------------------------------------
SYNU0/U4/uart_clk_o_reg/Q
0.31 4.45 -4.13 (VIOLATED)
SYNU0/U4/U8/Y 2.50 2.74 -0.25 (VIOLATED)
note:
1. the default_max_transition in technology lib is 4.5 .
2. the default_fanout_load is 1.0
3. during my syn. script, i set the load and drive as belows(no define for max_transition):
set_load 1.0 all_outputs()
set_drive 1.0 all_inputs()