mhytr
Member level 3
Can glitches be avoided?
I use a simple adder core generated by the Xilinx CoreGenerator to do a test,but i find glitches at the Non registered output.
Though the result of registered output is right ,is there anyway to avoid these glitches?
I use a simple adder core generated by the Xilinx CoreGenerator to do a test,but i find glitches at the Non registered output.
Though the result of registered output is right ,is there anyway to avoid these glitches?