mehran1367
Member level 3
hi all,
I want to see dynamic power in a huge vhdl code by considering the activity of signals. actually i want to add a few gates in the different paths. then i want to analyze the results.i think because my design is huge i cant do that. help
I want to see dynamic power in a huge vhdl code by considering the activity of signals. actually i want to add a few gates in the different paths. then i want to analyze the results.i think because my design is huge i cant do that. help