Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

micro architecture development guidelines/techniques/suggestions

Status
Not open for further replies.
A

asic_verification_learner

Newbie level 3
Joined
May 10, 2013
Messages
4
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,313
Hi ,
Would anyone suggest me , i need to develop micro-architecture of my design , i came to know that efficiency of RTL code depends upon micro-architecuture , so what are the techniques/rules/guidelines , ASIC designers follow while developing micro-architecture for their assigned specification.

how i need to divide the whole logic into partitions .... ?

techniques/guidelines , i came to know are
minimum data,, should flow ,, from one clock domain to another clock domain
we need to extract the common functionality ....
....
..

please help me , in this issue
Thanks in advance.
 

well the main difficulty to develop your own architecture is, it is an open or close architecture, I means, the component will be only used by you and never sail to any customers? Because there are some many patents to protect everythings on the various architecture, then you will be "attack", and you need to check the previous 20 years of patent in architecture to check you do not violate and previous patents.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top