Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

[Moved] fpga implementation of edge detection

Status
Not open for further replies.
P

prasathdavid

Newbie level 3
Joined
Feb 29, 2012
Messages
3
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,299
can anyone help me that how to store the image pixel values into FPGA for edge detection process?... is it necessary to load on fpga board or running on Xilinx is enough to get synthesis report.

send ur suggestions to [prasaathbeece@yahoo.com]
 
Last edited:

Re: fpga implementation of edge detection

If your signal goes through a series of gates, say 5, the output will be delayed by the delay of each gate, say 5nS each = 25 nS total. if you feed the original signal and the delayed signal into an exclusive OR gate, you will get a pulse of 25nS every time the input changes 1->0 and 0->1.
Frank
 

I guess, the question is referring to image processing.
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top