Data path and control path example

I am reading the book <Advance FPGA design> by Steven Kilts, and get confused with the data path and control path.
It says
"Data path and control blocks should be partition into defferent modules"

"Because data path is often the critical path of the design(the throughout of the design will be related to the timing of the pipeline), it may be required that a floorplan is designed for this path to achieve maximum performance. The control logic, on the other hand, will often have slower timing requirements placed on it because it is not a part of the primary data path."

For the first statement, could anyone give some example to show what control path and data path really are, and how to split them into seperate modules.

For the second statement, according to my knowledge, normally both control and data should in a same clock domain, thus same period constraint will apply on both. Then the timing slack of data path and control path should also be the same. If so, why data path could be considered as critical one, has more restrict timing requirement?

Hope someone can help me. Thanks in advance.

I believe the autor want to say, the data path that include, multiplication/adder/shift and other manipulation occurs in wide vector, instead the control path is normaly limited to few bit, like state machine value... Then the data path have more logic and "consume" more timing to go through this logic.

for the first statement, perhap, the autor idea is related to the way the fpga are build, for a asic point of view, i don't see the necessity to separate both paths.

Any digital system can be seen as a data path and control path..

Data path deals with the operations or processing of data...where as control path deals with when that operation or processing should be performed.