shethpurak
Junior Member level 1
Hi,
I am implementing a memory block which will go in the Altera FPGA and memory is about 4k big.
I am implementing this method to implement it in verilog
mem[wr_ptr] <= data_in for writing data
data_out = mem[rd_ptr] for reading data
Somebody suggested me to use block ram instead of using this logic
Can anybody tell me what is the difference between block ram and the way I implemented the memory block ?
Thanks
I am implementing a memory block which will go in the Altera FPGA and memory is about 4k big.
I am implementing this method to implement it in verilog
mem[wr_ptr] <= data_in for writing data
data_out = mem[rd_ptr] for reading data
Somebody suggested me to use block ram instead of using this logic
Can anybody tell me what is the difference between block ram and the way I implemented the memory block ?
Thanks