neoflash
Advanced Member level 1
verilog simulators provides a few format for data export, such as %b, %d (for decimal).
However, in case the vector is a signed number, how we let simulator export utility aware of it and process it correctly?
Added after 32 minutes:
also, how to fdiaplay the vector representing a real value.
How to let simulator aware where is the "dot" of this real value?
However, in case the vector is a signed number, how we let simulator export utility aware of it and process it correctly?
Added after 32 minutes:
also, how to fdiaplay the vector representing a real value.
How to let simulator aware where is the "dot" of this real value?