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There is no ASIC appropriate or a conversion formula for ASIC to FPGA. In ASIC, the gate count depends on the target library you are using. I say this as target library because, here we express Gate count in terms NAND gate area.
So we cannot perfectly map any FPGA based slice count to ASIC gate area.
Yes, its true that you can have an approximate gate count for your target design.
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