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compilation & simulation problem of SystemVerilog

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ramana459

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system verilog compilation

Hello friends,

I am in the learning stage of System Verilog, using Modelsim -6.2g version,
But it is not going to Compilation & simulation,

Will this software work for System Verilog or not?
are there any other tools which is supporting System Verilog code.

Any one of you have the document of System verilog using Modelsim,
Please send it to me.

Thanking you,


Regards,
Venkat Raman
 

ramana459 said:
Hello friends,

I am in the learning stage of System Verilog, using Modelsim -6.2g version,
But it is not going to Compilation & simulation,

Will this software work for System Verilog or not?
are there any other tools which is supporting System Verilog code.

Any one of you have the document of System verilog using Modelsim,
Please send it to me.

Thanking you,


Regards,
Venkat Raman
Click to expand...

Starting from the version 6.0 Modelsim supports SystemVerilog and SystemC.
If you are looking for other tools, u have the choice between Aldec Riviera Pro and Cadence ncsim which are very powerfull tools.
 

System Veilog won't work in modelsim 6.0 version
it works only in version 6.3c
 

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