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CMOS vpnp layout issue

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dkace

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I am using cmos9flp IBM that offers vpnp as forward bias diodes for bandgap design.

In the LVS I get an error showing that C is connected to sub! instead of VEE.

Has anyone any idea how to overcome this error?

D.
 

I suppose because the collector really -is- the substrate, and
your VEE net is not hardwired to sub! (at that level or below).
Maybe you should represent the reality of the device first (C=!sub)
in your schematic and let the hookup follow.

If the substrate is weakly tied, of course, !sub here and !sub
there may not be the same voltage and other nastiness may
ensue.
 
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    dkace

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Well, I have already tried this but and LVS is clear now ( along with MC simulation) but it looks really weird to have the collector to sub! and base to VEE as the real thing is not like this! What is more, on my first attempt, the VEE connection to substrate was more that good! Do you think I can continue with this layout AND design?
 

I think that the extract may simply force !sub to be its own node
and not respect that you have tied it to another signal. You might
use a presistor of very low value (approximating the substrate
tie / ring resistance to the collector, below center of emitter)
to emulate the reality of the VEE-to-substrate connection and
make things simulate sensibly. But look at the close-in layout of
the PNP and nearby ties / taps and make sure that it's nailed
down real well, and perhaps see if the base ought just to be
!sub connected on the schematic as well.

I expect in the end that VEE=sub! will be the reality, and you
may want to stick with !sub as a global with only the pad
named VEE and stood off extract-wise with a presistor. But I
hate globals. They're a hoax waiting to happen.
 

One solution I am working with is that the collector (C) on the parasitic bipolar is indeed a "sub connector", is the p-substrate for the bipolar.

Therefor, we must treat it as a local subc, and tie it down to the subc via a new metal.

In order to extract correct results from this, the resistance between local subc and sub! must be correct modeled or must be calculated with respect to the current flowing through the collector. Do you think that this describes the problem adequately?

D.
 

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