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if one large memory is used more address decoder could be right to access it
if larger memory is divided into memory banks only few bits is required to enable the bank of memory. no of gates required is reduced for address decoder.
then it speeds up the memory ,like using even memory ,odd memory then lower byte could be stored in bank and higher byte could be stored in other bank during accessing a byte only one bank is enabled ,while accessing word two banks could be enabled ............................
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