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Setup violation due to high fanout

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useless_skew

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Hi friends,

Timing reports on pre-CTS stage showed setup violations due to some cells with high fanout (wns was around -10). After pre-CTS optimization, wns was -0.8.
Whether it is ok to proceed with CTS and fix the violation later or change some constraints and have the placement done again?

Thanks,
useless_skew
 

its better to fix the setup violations b4 the P&R of the design , cos u have to ensure the ur design meets the specified/expected freq !!

only the hold viol ( minor violaions) can be fixed after the P&R !

WBR
Lakshman
 
Sounds like you a propagated clock before CTS, set the clock to ideal. And I agree with lakshman.ar, you should fix your violations before CTS.
 
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