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Doubts about charge pump functioning when CLK1 and CLK2 are set

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master_picengineer

master_picengineer

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Hi all,
I have some question and I hope you help me.
While studying the PFD (2dff+ and gate) , i found that the dffs resets when CLK1 and CLK2 are sets. At this moment the CP (composed of a PMOS and a NMOS transistor) has both PMOS and and NMOS on and there is a short circuit.
1- Is there a possibility to hurt the CP at that moment (Transistor burning) ?
2- I there another better better CP shematics that take into account this pb ?

Thanks in advance for your participation.
 

Re: Charge Pump Question

master_picengineer said:
Hi all,
I have some question and I hope you help me.
While studying the PFD (2dff+ and gate) , i found that the dffs resets when CLK1 and CLK2 are sets. At this moment the CP (composed of a PMOS and a NMOS transistor) has both PMOS and and NMOS on and there is a short circuit.
1- Is there a possibility to hurt the CP at that moment (Transistor burning) ?
2- I there another better better CP shematics that take into account this pb ?

Thanks in advance for your participation.
Click to expand...
hi
yes, you are right, but the short current is limitted by up and down current source, and besides, this short period is introduced trickily to reduce dead-zone. more information plz refer to Razavi's book.
good luck
jeff
 
Charge Pump Question

Hi,
I don't understand, please elaborate. In fact Let suppose the situation when Clk1 and CLK2 are set and that the 2 dffs does not resets quickly (case of breakdown in the 2 dff).
 

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