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Can not recognize the input clock

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EDA_hg81

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I am using Spartan 3 FPGA.

The A8( GCLK) pin receive the input clock.

I have used scope to check the input clock, it is looks fine.

But why FPGA can not recognize the input clock?

Code like the following:
if ( CLOCK'EVENT and CLOCK = '1' ) then

end if;

If it is possible I have to set FPGA in proper setting ?

Any idea is appreciated.[/u]
 

What i did is using above code to check if FPGA can get proper clock.

But it didn't and the input clock look fine.

I really do not have any idea where is wrong?

SO i am thinking if Spartan 3 need to be set under a kind of mode for working properly.

the I/O bank for input clock is 3.3V.

Do you think IO standard matters?

Thanks.
 

hi,
i feel that there is somthing wrong during ur port mapping of input clock.Please check it /pin assignment to this input clock port.
regard
alt007
 

    E

    EDA_hg81

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chcek the synthesis report. hope that port is unsued or clock is not used in design.

if u have a debug port route the internal clock and check.
 

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    EDA_hg81

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I found the level of input clock is around 5 V.

This matters with 3.3V IO or not?

I think 5V input is compatible wit 3.3V.
 

EDA_hg81 said:
I found the level of input clock is around 5 V.

This matters with 3.3V IO or not?

I think 5V input is compatible wit 3.3V.
Click to expand...

There are a few problems with 3.3V devices "tolerant" at 5V signal levels.

The 3.3V device must be able to sink the surrent surplus comming from a 5V device. This is usually done through the input limiting diodes and the 3.3V power supply.
However, anytime is possible, put a small resistor in series with the IO lines (at least 22 to 50 ohm) when a bigger signal than devices supply is interfaced in "tolerant" mode.

Beware of the RC integration effect, where C is the parasytic IO pin capacitance (usually about 3 to 7pF).
 

    E

    EDA_hg81

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I aslo checked ground noise. the peak of noise is 100mv.

Do you think this noise is big enough to interupt the core power supply(1.2V) for Spartan 3?

if the input voltage level is 3.3V( LVTTL or other 3.3V IO standrad), spartan3 is going to recognize them any way.

right?

Added after 44 minutes:

I found out where is wrong.

Since in spartan 3 they use high as reset, but I use low as rest.

So I was keeping reseting DCM.

Thank you all for any suggestions and have a good weekend.
 

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