Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by waxtomato

  1. W

    How to reject the ripple of supply?

    normally regulator need RC to stabilize, some even place C on board
  2. W

    Which is the best tool for layout and simulation at home ?

    no one will sue you if you are not own a multi-million revenue company you know what i mean ?
  3. W

    How to perform the Monte Carlo simulation in Analog Design Environment?

    Monte Carlo lot of people use ".modif" too, pls refer hpsice manual
  4. W

    Do I have to design two CMFBs for two stage differential opamp?

    opamp and CMFB- if common mode Vs of two stages are different or need to control independly
  5. W

    why do we use poly to connect poly

    with policide, the res of poly only 20~50 oh/sq
  6. W

    Detailed description of the Deep N well

    Deep N well basiclly, you can provide Pmos with different Nwell for bulk voltage, how about Nmos? With Deep newll you can do it too. secondly, Deep Nwell can used as guardring
  7. W

    should bandgap voltage always be the same for same technolog

    bandgap is nothing about you design , it only reply on your process
  8. W

    How to convert PAL signal to NTSC?

    TV question most tv can accept pal and ntsc both, or you can buy a tv card for PC
  9. W

    Capacitor Leakage Current

    I think the spec is kind of strange, since I=Q/t, mA/hours is a wrong unit they already told you Q=CV, Q=I*T dV=I*dT/C
  10. W

    How to find the output swing of fully differential amp????

    of course, the max possible swing is 1.8*2, but you need upload the circuit image , we can figure out the exact swing
  11. W

    NPLUS & PPLUS in modern process

    to reduce the resistor of poly, but increase more defect
  12. W

    What is a difference between PWELL and PSUB?

    PWELL Vs Psub There sure are diff between Pwell and Psub But if you just has twin-well tech, to the point view of layout, pWell is Psub, for no pwell need to be drawn
  13. W

    What is the major difference in 0.18um and 90nm technology?

    Process Difference Believe me there are huge diffs almost all good design which work @ 0.18u will not work @ 0.09u, unless you overdesigned too much.
  14. W

    Problem with negative gain and phase margin when doing AC analysis

    AC analysis 2 possible reason 1) wrong expression in you input deck 2) congradulation you get a regulator
  15. W

    Do i suit to be an analog IC designer?

    no problem, just spend time to read some book, solve the problems in textbook, browse IEEE solid state circuit once a month, try to visit forum AFAP, build some IP block youself. That will be a good beginning
See more

Part and Inventory Search

Back
Top