NPLUS & PPLUS in modern process

[fixrouter4400]

Hi All!

I just wandering why in the modern process you need to enclosed the POLY layer by an NPLUS for NMOS and PPLUS for PMOS?

In older process you only need PPLUS or NPLUS to the active poly and it DRC doesn't complain about the overlap of POLY in PPLUS/NPLUS.

Can someone give a concrete explanation on this.

Thank you.

 

[protonixs]

hello!
i have same question, too.
im also wondering y poly needs it.

 

[transbrother]

It depends on whether the process allows silicided gates. Silicided gates, whereby poly gates are doped n or p allows them to be ~3-4 ohms/sq. Whereas in the older processes where the gates are non-silicided, your poly sheet res. is ~ 1kohms/sq. That is why in processes of today u have p or n doped poly to allow for less prop. delay due to charging up of the gates.

-transbrother

 

[waxtomato]

to reduce the resistor of poly, but increase more defect

 

[Grig]

Hello
This masks set Vth also.

 

[rajanarender_suram]

I think its to control Vth of the mosfets

Added after 4 hours 1 minutes:

with N+ poly vth<0.5 for Nmos is easy and for Pmos getting Vth<0.5 is hard to get and Vice versa is true for
P+ poly.

Therefore we use Dual poly i.e N+ Poly for NMOS and P+ poly for Pmos for Short channel devices.