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Thanks for the feedback "dick_freebird". Unfortunately, I have to use this process (SiGe), not an SOI or LDMOS process, therefore I can't take advantage of any of the High voltage device or techniques you mentioned.
I was trying to add several diode drop NPNs before the main device, but it...
I'm trying to design a open collector circuit that will tolerate 7v across the transistor. The issue i'm having is that the transistor devices in my design kits can only support voltage no larger than 4.5v. Can you suggest anything that I could do to make the circuit more robust?
Please let me...
yes, i agree that the output might not be a good area to modify the design, since it already at the rail. However, i was thing that there might be something that i can do at the input section to change the base bias voltage so that the final dc output is pegged high (outp - 3.1V) and low (outn -...
Hi, thanks in advanced for your help. I'm very new to circuit designs so let me know if you further information is needed to clarify the question.
I have attached a screen capture of the circuit (differential amplifier for driving Gilbert mixer LO amplifier) in question. I'm trying to add a...
thanks for the response, FvM. Sorry it took so long....
unfortunately, a critical system requirement is that the mixer have high IP3 and P1dB, but the standard Gilbert topology (RF stage) is very limited since it a Class A. This is approach (showed in the picture) is a class ab, but the bias...
Gilbert Mixer RF stage causing spur problems
Hi,
i kind of new to RFIC design. The problem i'm having is related to a Gilbert mixer designed for high linearity. my problem in particular is higher even order spurs (2*RF...4*RF) due to the mixer Rf stage (I think). I have tried using an ideal LO...
i'm sort-off (been around a few years, but just recently started designing) new to RFIC design. The issue is my gilber mixer design has a higher 2nd order spur (2xRf) on the output, much higher than is expected, since typically the 2nd harmonic is expect to be >80dBc at the mixer output. I'm...
I have an issue - my receiver TOI degrades significantly when measure after ADC limiter.... TOI for the receiver is as expected when measured after IF Amplifier; however, i notice significant degradation when TOI is measured after IF filter (the IF filter is the 2nd part after the IF amplifier...
I would really appreciate any help/answer.
I'm new to Labview and is trying to output data from a R&S FSEM20 to a D:\ drive (ZIP) - I'm having trouble naming the files using the the VI provided by R&S...
Thanks!
Re: LO synthesizing issue
biff44,
I understand that option of multiplying my LO for higher LO and will probably use this technique; however, i'm not familiar with the other option: "split your synthesizer and use a dual downconversion" - how would this work in a transmitter
Also, my...
Re: LO synthesizing issue
OK, now i see what you mean. If was to get a subharmonic mixer, i would more than likely have a custom part made through synergy, miteq or any other vendor that design this sort of thing for a living...
Re: LO synthesizing issue
Thanks for your suggestion biff44.
I initially had this in mind, but was little reluctant because adding a x2 would require a driving amplifier and BPF which would take up more board space.
again, thank you very much for your help - please let me know if you have...
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