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I have the following scenario . there are 8 inputs numbered from 0 to 7. Each input has identifier indicating the number it maps to between 0 to 7. I need to design a circuit that will output the inputs having a number. for example the number 4 is in inputs 1, 3, 5, 6. if i give the input to the...
For the full adder circuit realized with one 3-input XOR gate for sum, three 2-input AND gate and one 3-input OR gate the power consumed for these gates is x mW. The full adder circuit designed from two 2:1 multiplexers, one XOR/XNOR, one AND/OR gate based on the value of c input is ymW. I find...
I have 4-way set associative cache of eight sets. My address trace maps to sets 0,4,3,2,5. The number of lines to be placed in sets 3, 5 are 6, 7 respectively. For other sets it is less than or equal to four. I request you to let me know if it is feasible in hardware to map the unused ways to...
I created schematic of my logic in Quartus II. i want to check the power consumption in this circuit for various boolean gates by converting them to CMOS technology. i request you to let me know the software/procedure to obtain this. i tried to use Pspice but the format of the file it accepts is...
i request you to let me know if the following is correct
1. the power consumed in circuit is sum of the power consumed in its components.
if a circuit has sequential and combinational components, then
power of the sequential component = power of whole circuit - power of combinational component...
i have designed cache with sequential circuit to selectively switch on the sets. i need to calculate the power consumption of this circuit. i request you to let me know the procedure to do this using Quartus software. basically i have the following circuit
1. cache as array of 4 elements
2. a...
I want to design 4-way set associative cache of eight sets. i use the following verilog code to view this as array of 32 entries.
reg[0..7] sa[0..31];
can i selectively put off the array elements using power gating thus disabling the cache ways? is there any better method to achieve this?
i have designed digital circuit. i need to compare the power consumption of this circuit with existing circuit with similar function. i request you to let me know the software to be used for this. i tried pspice/orcad but i find that the data has to be manually entered. i am looking for a tool...
I have declared array of 16 bits containing 32 entries. Each of the entries has values ranging from one bit to sixteen bits. How do I determine the number of bits in an entry?
I need to design a system with the following specifications.
1. it accepts as input 6 bit number, updates the count of the number. there are 64 possibilities. the total samle size is less than 2^64.
2. it finds minimum and maximum of given set of 64 numbers (from 1 above), finds the average as...
I have the following requirement. I request you to let me know the energy consumed in this.
1. need a component that accepts 6 bits as input and updates the count of the decimal number it represents. There are 64 of such counters.
2. need a component to calculate the minimum and maximum of...
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