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Hi,
I heard that LOS causes fake failures on tester due to the fact that it tends to test fake transition(I heard of it somewhere). The reason being it sets up value easily because it is done during shift and ATPG tool has full control. Were as in LOC the vector V2 sets it up in functional...
Hi,
I am trying to understand the reason behind the order in which we run ATPG (I am avoiding Path-delay to avoid confusion)
1. TFT
2. Stuck-at
3. Reset
4. retention
Why do we run TFT before stuck-at? One reason I can think of is to detect at-speed fault because we use accumulation of...
Hi All,
My question on launch of shift is we have two ways of achieving this
1) treat scan_enable as clock and expand it.
2) Pipeline scan enable.
Now when we pipeline scan_enable what clock does the pipeline registers of scan enable get and what is it's relation with scan clock?
In a...
Hi All,
Does mentor have a tool to help diagnose failures in EDT mode(exact failing bit). Right now we run BYPASS mode which takes a long time to find the exact failure bit.
Is that edt bypass on means switching off the edt.
A) yes.
If it is so what is the difference between the fastscan and edt in bypass mode.
A) Fastscan can't run if bypass is not on(edt ON). You can use EDT only with testKompress. In testKompress u can use only EDT(not sure!! Have never tried).
In the case of edt bypass on the tool will uses the same number of scan channels as fast scan.In the bypass mode does compression takes place or not?
a) yes the channels are always the same. Thats the point of using EDT. To the tester it looks like say 8 scan channels, but internaly when...
Re: Scan chain balance
--> If each scan chain uses a set of test vectors, wouldn't the worst case scan "run time" be a factor of which scan chain requires the largest set of vectors?
A) you are confused. Scan chain has nothing to do with the vectors. Scan chain is a factor number of FF in ur...
Re: Scan chain balance
1) What port are you using to shift the pattern in?
a) Scan in ports
2) How do you select a single scan chain when you are shifting in/out?
b) you cant. You total shift in time and shift out time equals your longest chain length.
3) Assuming you can...
Re: Scan chain balance
Balancing the scan chain is critical because if you have scan 10 scan chains and 9 chains has 10 flops but the 10th chain has 100 flops each shift has to be 100 clock pulses and unnecessarily the tool has to insert X for 90 clock cycles. so your overall test time for one...
Hi All,
First of all thanks for all your inputs. I am using encounter_test for the first time(worked with TK and fastscan all my life). I am having hard time understanding the use of experiment in various ET commands like create_logic_test and commit_tests. One example is I run an experiment...
Re: leakage i/o
Hi RCA,
Thanks for the reply. I will do the same. But what purpose does this leakage I/O and the pull up and pull down's on them serve?
I would like to get some info or document about leakage i/o as I have no clue about the functionality. There are control pins on it and I need to configure them for DFT mode. I see some pull and pull down resistors on them. Why do we have to use leakage I/o instead of normal ones.
Appreciate...
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