Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Reason for particular ATPG fault sequence

Status
Not open for further replies.

sajjaudaykumar

Junior Member level 1
Junior Member level 1
Joined
Feb 26, 2009
Messages
16
Helped
1
Reputation
2
Reaction score
1
Trophy points
1,283
Visit site
Activity points
1,391
Hi,
I am trying to understand the reason behind the order in which we run ATPG (I am avoiding Path-delay to avoid confusion)
1. TFT
2. Stuck-at
3. Reset
4. retention

Why do we run TFT before stuck-at? One reason I can think of is to detect at-speed fault because we use accumulation of faults, so if we run stuck-at first these the critical faults can be ignored due to these faults already being detected.
Another reason is what I have a doubt.
Can we say stuck-at fault is 0-0 or 1-1 transition due to fault propagation? If so TFT also inherently detects 0-0 and 1-1 while targeting 0-1 or 1-0 transition.

Regards
uday
 

Hi,
Is it necessary that first we generate the transition fault patterns and then stuck at fault patterns?
If yes,please let me know the reason.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top