Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Most likely HFSS can't build mesh properly around your object. there are some object that are too small and complex to build the tet around. try avoid sharp narrow egdes which at time won't contribute too much to end result.
HFSS v10 has healing feature which can eliminate this problem
hfss combine designer
For black box approach, I don't think it can be done. However, there is an option with HFSS + Ansoft Designer combination.
You need to set up ports at the point where you have lumped component in HFSS. Like capacitor case, at the pad to GND. Let say you name this port...
If i understand you correctly,
Looks like you can set-up airbox sorrounding the 10x10cm plate and assign waveport at the coax-feed where it is connected to the split. At the receive side, use lumped port from 1mm width metal to another metal at the bottom, assuming you are using this as GND...
For low freq (1GHz) we are using Q3D to extract the model and proceed to Hspice for SI analysis
For higher freq, HFSS is used to model the package and same Hspice for SI Analysis.
Latest trend/development in Ansoft Designer makes it a good alternative for full path simulation i.e. when...
PLL is not the easiest subject to learn. However, you can start by reading some reputable text book like analog design by Razavi and Thomas Lee to begin with. Hajimiri wrote one PLL book but this one for more advanced user. Go to UCLA ICSL website. Used to have lots of paper on PLL but...
I have some objects created in mechanical engineering software like Pro Eng or AutoCad that needs to be modeled in Q3D as 3D object for electrical model extraction. Anybody has done this before? Is there a special version of AnsoftLinks that allows this kind of conversion. thanks.
Re: RF PCB design
1. Shield clock, noisy signals
2. Partition your block.
3. Simulate your circuit.
4. Calculate trace width before layout.
5. Be careful with different power supply ground return.
In general, all high speed/RF/microwave design guidelines need to be taken into consideration.
Re: FDTD
Google search will do wonders. i have a paper on this but needs some time to locate it. I will post it soon once I found it. I found that paper while I was looking for info on FMM
leakage current for 90nm process is 100nA per transistor. for big chip like prescott that has 152million transistor, that counts for 15.2mA just for leakage current.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
