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Recent content by rf_ray

  1. R

    ur opinion on technology scaling for Analog design

    Mostly cons..Some designer rarely use minimum length even it's available.
  2. R

    Wrong BW simulation reports of analog switch

    Re: BW of analog switch Did you use package or on wafer measurement? Make proper calibration if needed.
  3. R

    Does PSS simulation in cadence inclulde noise

    In mixer we usually use PSS simulation to evaluate the conversion gain/loss. But seems some noise is not included.
  4. R

    How to simulate the jitter of an inverter chain in cadence

    inverter jitter Thank you very much.
  5. R

    How to simulate the jitter of an inverter chain in cadence

    how to simulate jitter in cadence Transient simulation won't include the noise introduced. Is there anyway we can include effect of jitter when conducting transient simulation in Cadence?
  6. R

    Design big delay element

    If you are dealing with digital signal, then use counter (could be complicated). If it's small signal I don't think there is anyway you can achieve that (The delay is simply too big)
  7. R

    A question on voltage ref

    Gm does change with temperature.
  8. R

    Design ideas on a DC to 5GHz CMOS low noise amplifier

    12dB-10dB means the the gain drop from 12dB at DC to 10dB at 4GHz. Yes, I have several active circuits tape out and conducted the measurement. Using the design kit, usually the gain will drop around 2dB and noise will rise no more than 2dB comparing with simulation results. The return loss...
  9. R

    Design ideas on a DC to 5GHz CMOS low noise amplifier

    wrong..I didn't convert current signal to voltage signal. The input of my LNA is directly connected to antenna. The output of LNA is connected to a sampling mixer. It IS A TYPICAL RF LNA!!!
  10. R

    Problem with Diva LVS when using multi-finger transistors

    diva lvs cdf parameter In schematic , try to play with number of fingers and multiplication factor, I guess one of them will reflect the layout finger number.
  11. R

    Design ideas on a DC to 5GHz CMOS low noise amplifier

    I appreciate all the comments you guys provided. But seems my question was posted on the wrong board( I posted this question on analog IC board but got deleted right way, which I think doesn't make any sense). It seems to me that people who did the hybrid microwave/RF design are not quite...
  12. R

    Design ideas on a DC to 5GHz CMOS low noise amplifier

    Zencir, E.; Tekin, A.; Dogan, N.S.; Arvas, E.;"A low-power DC-7-GHz SOI CMOS distributed amplifier", Circuits and Systems, 2004. ISCAS '04. Proceedings of the 2004 International Symposium on Volume 1, 23-26 May 2004 Page(s):I - 605-8 Vol.1 Ren-Chieh Liu; Huei Wang;"DC-to-15- and DC-to-30-GHz...
  13. R

    How to solve a VCO measurement problem with phase noise

    VCO measurement problem I will suggested you testing the VCO in a room with clean ground. We run into this problem before. Later we test it in another building. The spectrum is stable.
  14. R

    Does the Q-factor of components (L/C) impact on matching?

    Yes, definitely will degrade the return loss and insertion loss
  15. R

    Design ideas on a DC to 5GHz CMOS low noise amplifier

    Not necessarily 0Hz to 5GHz. 100MHz to 5GHz is fine. I guess
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