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Recent content by Rahul Soni

  1. R

    XAUI (10G) Combo Port PHY for Ehternet Switch

    Hello All, I'm trying to complete the 10 port switch desing which requires 8 GE copper ports and 2 combo ports (Copper+Fiber). I'm using 88SE6390 switch IC from Marvell which has 8 integrated GE PHYs and provide 2 SERDES lanes to connect any MAC/PHY externally. When I look for a SGMII/ RGMII...
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    DC DC Regulator Loading

    Hi, Can anyone tell me what will be the effect if I design my buck regulator to provide 20Amps current but use only 3-5 Amps of current? I am designing a board with 24 SSDs that require about 20Amps of current at 5V. Now suppose I intend to use only 3,4 drives and it takes only 2-3 Amps...
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    SDHC card detection pin

    Is it mandatory to use CD pin ?
  4. R

    SDHC card detection pin

    I am asking about processor pin. CD pin is not multiplexed with DAT3 ... Ir is multiplexed with IIC pin ... processor is ls2085.
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    SDHC card detection pin

    Is is mandatory to use CD pin of SDHC interface. In my processor, SDHC_CD pin is multiplexed with IIC_CLK (I2C CLOCK) and I want to use both IIC and SDHC. Can I use this pin as I2C_CLK. Will it effect SDHC protocol if I use this pin as IIC+CLK instead of SDHC_CD?
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    DDR4 RAM connection doubt.

    How can I connect DDR4 RAM ( x64) with a x32 SO- DIMM connector. What changes I'll have to make?
  7. R

    [SOLVED] Differential signals generation

    Ok.. How can i aplly two inputs at the base of second BJT?
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    LVPECL to LVDS termination.

    The 100 ohm resistor will generate the 350mV at its terminals. (Since, in LVDS we have a 3.5mA current source.) Now to make the common mode voltage same of both (LVDS and LVPECL) we are using a resistor divider. According to this, i'll get the appropriate common mode voltage on second line ...
  9. R

    Help on LVPECL and LVDS design !!!

    Hope this will work.
  10. R

    LVPECL to LVDS termination.

    This is the standard to convert LVPECL to LVDS termination. I am confused here to see the voltage divider of 10k and 10k only on one line. Shouldn't this divider be present on the upper line also? Thanks in advance.
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    LVDS (Low Voltage Differential Signalling) Power Supply.

    I think in LVDS, we have a current source with 3.5mA and a 100ohm resistor at the receiver end. Which generates the 3.5mV, and according to the polarity, we define whether it is 0 or 1. But I am not sure how this signalling can work on different power supplies.
  12. R

    LVDS (Low Voltage Differential Signalling) Power Supply.

    LVDS technology is not dependent on a specific power supply, such as +5V,+3.3V,or +2.5V. There is an easy migration path to lower supply voltages. How does it work?
  13. R

    Common mode voltage significance.

    While using ICS85104I fan out buffer, I found this table I am unable to understand why this Vcm is provided and where will it be used? Thanks in advance.
  14. R

    Common mode voltage significance.

    What is the significance of common mode voltage(CMV)? In the datasheets, common mode voltage is given with the differential voltage. What is the use of common mode voltage. What will be the effects if we don't consider CMV. ? thanks in advance :)
  15. R

    [SOLVED] Differential signals generation

    Thanks Sunnyskuyguy :) In the circuit given above, the inputs are already out of phase, so the above circuit is just a differential amplifier. I need to generate differential signals using BJT. Can we generate differential signals just by giving a single input. Crustchow has given a circuit...

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