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LVDS technology is not dependent on a specific power supply, such as +5V,+3.3V,or +2.5V. There is an easy migration path to lower supply voltages. How does it work?
It "works" by using a fixed signal level (Vd = 0.2V, Vcm = 1.2V) independent of the supply voltage. Did you read and understand the LVDS level specification?
Or do you ask how an LVDS transmitter and receiver are designed internally? Looking at datasheets gives a first idea about it.
I think in LVDS, we have a current source with 3.5mA and a 100ohm resistor at the receiver end. Which generates the 3.5mV, and according to the polarity, we define whether it is 0 or 1.
But I am not sure how this signalling can work on different power supplies.
The driver should act as a switched current source
with a common-mode voltage that is set by feedback
when you're talking LVDS. LVPECL assumes an external
termination network. The LVDS independent common
mode control makes termination simple (differential
only) and minimizes wasted power, which a resistor
divider external creating (say) VTT @ 50 ohms
from 5V is going to burn about 200mA per output-pair,
a sweet watt of power going nowhere useful. The CM
feedback (w/ reference) is what allows supply independent
(or, quite usefully, cross-supply-domain) operation specs.
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