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hi frns.... iam attaching ADS file (.dsn) by this post...this is a mixer...i could not get gain from this mixer though it is an active mixer...plzz find the problem where it can be....and give necessary suggestions...
thankin u...
dear friends,
iam designing and implementing 5 GHz active FET mixer for my project...i have designed the mixer, but mixer gives no gain....can i send my ADS file to u people..so that u can give suggestions to my problem...after wards i have to implement on the substrate...plzz... reply...
dear frns..
can any one olzz tell me how to find the output impedance of HJFET , i have one transistor NE4210S01, i want to find the output impedance of this transistor...iam attaching the data sheet of this HJFET , plzz tell me the procedure to calculate the output impedance of HJFET
yaa i applied gate bias (-0.4 v) and drain bias (2 v ) as per my transistor bias operating point...
i even tried different bias network...but the result was same....i didnot get conversion gain...
plzz... help....
i uploaded my design block diagram and posted in RF, antennas nad optics...
iam sending block diagram of my mixer design...frns plzz look at those picture and suggest the necessary design at output side i.e at the drain side..
i need ur help at IF matching circuit and LPF design
RF frequency was 5 GHz...
and LO frequecny was 5.02 GHZ
IF frequecny was 10...
first i combined RF and LO signals ... and the combined RF and LO signal i applied to the gate ...this is my design at input side...so mixer is active one...the problem is at the drain side ...i donno how to design IF matching circuit ..i.e at what frequency whether it is at RF or IF ...and...
dear frns...
iam designing mixer in ADS tool..., mixer designing was completed and implemented in ADS....applied RF and LO signals at input side , and it is single gate FET mixer ....
problem lies is that .... i applied gate bias at gate , drain bias at drain of the FET &
RF signal at 5...
dear frns...
iam designing mixer in ADS tool..., mixer designing was completed and implemented in ADS....applied RF and LO signals at input side , and it is single gate FET mixer ....
problem lies is that .... i applied gate bias at gate , drain bias at drain of the FET &
RF...
dear frns...
i need to design an LPF with an input impedance of 150 ohm and output impedance of 50 ohm...
plzz...any one can describe me how to design or suggest any paper or article or text book ..so that i can get help from u....
thanks and regards....
dear frns...
i need to design an LPF with an input impedance of 150 ohm and output impedance of 50 ohm...
plzz...any one can describe me how to design or suggest any paper or article so that i can get help from u....
thanks and regards....
my design consists ... after diplexer...following r the circuits...below
input matching circuit ------> Transistor -------> IF matching circuit ----->LPF---->IF...
no my design consists ... after diplexer...following r the circuits...below
input matching circuit ------> Transistor -------> IF matching circuit ----->LPF---->IF...
dear frns...plzz help
i have one problem regarding my design...iam designing a mixer in that after the transistor there will be an IF matching circuit followed by low pass filter...IF matching circuit is to match the transistor output impedance to 50 ohm of LPF input port...
dear frns....
how to find input and output impedance of the FET using s-parametrs of that device...plzz give the formulae to calculate the impedances using s-parameters.....
thanking u..
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