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Recent content by nathanee

  1. N

    Question about the gain-boosting method for OTA

    gain-boosting OTA Hi, there, In order to improve the gain of an OTA, the gain-boosting method is an useful thchnique. what is the relationship between main OTA, and "A" shown in the figure? Supposed that the UGB of main OTA is 200MHz, how about the opamp "A"? Is any systematic calculation...
  2. N

    the FFT windows used in sigma delta ADC

    Hi, there, For nyquist-rate ADC, the most window applied is Hann or Rectangular. How about sigma-delta ADC? I have read some paper, and blackman window is used. Why? Can Hann windows still apply or not? BR, -nathan
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    audio switch and video switch

    Hi, There are some product like audio switch, video switch and audio/video switch. The T-switch is a pratical design for video switch, is there any other implementation for video switch? How about audio switch, can it use T-swtich or not. Any reference paper for these switches is very...
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    sigma-delta versus nyquist rate ADC

    nyquist adc Hi, Both of sigma-delta and nyquist ADC have SND, SNDR, THD, SFDR specification. But, why sigma-delta has extra OL(over-load) and DR(dynamic range) spec? Is there any phyical meaning of these? Thanks in advance. BR, -nathan
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    Stanford ee392b's handouts

    Does anyone have ee392b's handouts? Or any valuable website regarding to cmos image sensor is recommanded? Thanks in advance.
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    high noise floor in measured 12b ADC

    how many sample number you take to calculate FFT? for a 12 bit ADC, you should take 2^13 sample at least.
  7. N

    The opamp share of ADC ?

    What is the side effect if the opamp sharing technique is used? As I know, the opamp is never reset, and this will result in memory effect. Anything else? BR, -nathan
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    how to define PLL charge pump current value?

    This is a trade-off and depends on the application. The lower charge pump current, the SNR is worse. If the charge pump current is large, you have to take care up and down current mismatch.
  9. N

    data converter DC and AC performance.

    What is the relationship between AC and DC performance of data converter, including ADC and DAC? The DC performance is INL and DNL and AC performance is SNR, SFDR, SNDR. Can I conclude that if a data converter has good DC performacen and than the AC performace is good as well, vice versa? If...
  10. N

    Question about settling time of DAC

    1. Try to use smaller switches size. 2. Tyr to use Nmos as current source.
  11. N

    Help, cadence simulation problem.

    You have to assign model file in Setup/Model Libraries.
  12. N

    my cadence cannot simulate...

    fail to compile ahdlcmi module library Please help to check the version of cadence IC. if the version is 5.10.41.169, there will have this error message. The solution is to upgrade to 5.10.41.500.
  13. N

    A question about this cmfb circuit

    Once the cmfb is stable, (Vcm-Vcs)=(Vo1-Vcmc). Thus, there is no charge transfer from C1 to C2.
  14. N

    output resistance and outptu capacitance of DAC

    The method by using ac signal and sweep frequency is to measure AC response of DAC output. But, the datasheet spec is DC-ACCURACY, instead of AC. This make me confused. Any opinion/suggestion is welcomed. BR, -nathanee
  15. N

    output resistance and outptu capacitance of DAC

    Hi, there, There are 2 DC accuracy spec in digital to analog converter datasheet. Take TI, DAC900 for example. 1. output resistance = 200k ohm. 2. output capacitance = 12pF. My questions are, 1. how to simulate these spec? 2. which performance parameters the output capacitance/resistance...
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