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Recent content by leo_o2

  1. leo_o2

    about on-chip capacitor

    The on-chip capacitor can be used for on-chip oscillator.
  2. leo_o2

    diode for boost converter

    Yes. Waveform for SW node is a switching voltage. The diode and the output capacitor make the output of boost a DC voltage.
  3. leo_o2

    Flash memory IC damage reason

    I heard usb flash disk might be damaged if it is pulled out (disconnected from power supply) when it was under writing. What's the reason? Thanks.
  4. leo_o2

    What experience required to start a startup fabless company in Electronics ?

    Maybe it is good to study other's failure. However, IC should not be good field for start-up.
  5. leo_o2

    Flash memory IC damage reason

    Would you please explain main flash damage reason and how to avoid flash IC damage in design?
  6. leo_o2

    Matching and Layout problems !!!

    how about: D ABBA BAAB ABBA BAAB ABBA D D BAAB ABBA BAAB ABBA BAAB D D ABBA BAAB ABBA BAAB ABBA D
  7. leo_o2

    RC oscillator design cadence

    I guess the loop gain is too small. Please try to add more 2 stages of amplifier.
  8. leo_o2

    Slew rate of the OPAMP for DC application

    Hi ananthesh, Slew rate of opamp might influence the start-up time of the voltage reference. When it is power off, it takes some time to start up the target value. If more current is burned, your reference voltage will start up faster.
  9. leo_o2

    Chopper technique in neuron transistor

    stored offset and cancel it.
  10. leo_o2

    I/P reference clk and feedback clk offset in PLL

    Offset is 2nS? This offset is found in simulation or measurement?
  11. leo_o2

    If I want to know the meaning of model name in TSMC tech?

    "6t" means 6 terminals.
  12. leo_o2

    [SOLVED] No matching "SUBCKT"

    Maybe you need to re-generate netlist. Please check the netlist file. Maybe you can post your netlist file for further help.
  13. leo_o2

    Memory effect for Li-ion battery

    Understand,tpetar. However, it is my job to design a better (faster and safe) charger IC. I want to surpass the conventional scheme.
  14. leo_o2

    Is too large a Vds a reliability risk?

    Yes. It is HCI concern if MOS is off.
  15. leo_o2

    Maximum current in CMOS

    Besides considerations above, an additional limit for max current is thermal effect. Except gate breakdown, many damages in transistor are found to be overheat damage.
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