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Recent content by Johnson

  1. J

    Interactive Diff-Pair Length Tuning - Altium Designer

    Design is a DDR2 board, I am trying to tune each DQS group. Each group contain an 8-bit single ended data lines and a differential pair. Interactive routing and length tuning of single ended section is fine, but the diff pair fails. I used following rule in the "Matched Net Length" section...
  2. J

    Interactive Diff-Pair Length Tuning - Altium Designer

    Defining _P and _N leads to a diff. pair class, and last statement "(IsDifferentialPair And (Name = 'DDR2_DQS0'))", cover both lines. Any other suggestion?
  3. J

    Interactive Diff-Pair Length Tuning - Altium Designer

    I need your help in length tuning a group of nets! Design is a DDR2 board, I am trying to tune each DQS group. Each group contain an 8-bit single ended data lines and a differential pair. Interactive routing and length tuning of single ended section is fine, but the diff pair fails. I used...
  4. J

    Creating netlist from Altium for Allegro Layout

    I am wondering really! There is no way to generate Allegro netlist from DXP schematics, yes?
  5. J

    Creating netlist from Altium for Allegro Layout

    Any help?
  6. J

    Creating netlist from Altium for Allegro Layout

    I am wondering is there any possibility to generate netlist from Altium for Cadence Allegro? Actually I want to use Altium for schematic design and Allegro for layout, and do not want to use any import/export to other third party tools, like OrCAD schematic. Direct interface from Altium to...
  7. J

    Help needed for Altium

    Dear Penrico, How to add border and title block? Do I have to draw it manually?
  8. J

    Help needed for Altium

    1) Any comment about how to add border sheet on pcb desig, 2) And how to move a selected item (mostly text and graphic) from one layer to another, i. e. from "top silk" to "assembly drawing"
  9. J

    ELC (Encounter Library Characterization )(

    Any help?
  10. J

    ELC (Encounter Library Characterization )(

    Is ELC (Encounter Library Characterization ) a sperate product or it is included in main encounter toolset?
  11. J

    Timing Analysis in Cadence Encounter

    So can we conclude that pulsed dual edge triggered latch is now supported with major EDA vendors, specially cadence soc encounter 8.1?
  12. J

    Timing Analysis in Cadence Encounter

    Any comment?
  13. J

    Timing Analysis in Cadence Encounter

    With dual-edge triggered flip-flop (DETFF), I do mean a flip-flop which is able to capture data at both clock edge, i.e. rising and falling. The DETFF is able to do the same job with half of freq. compared to ordinary flops.
  14. J

    Timing Analysis in Cadence Encounter

    cadence encounter sta I had two questions and want to repeat them here again: 1) Regarding dual-edge triggered flip-flop, is cadende tools and STA engine supporting this kind of flip-flops? what about synopsys flow and tools? 3) Is current digital design tools supporting pulsed latches? I...
  15. J

    DET and pulsed flip-flop in synopsys!

    Is synopsys tools supprting dual edge triggering (DET) and pulsed flip-flops?
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