Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
spice smash biaschk
Hi,
In hspice testbench, is there a statement that measures any of the transistors going into linear region instead of saturation region ... or measures all transistors' Vds to prevent breakdown by huge Vds?
fractional divider
Hi,
Can anyone please give me references about fractional frequency divider? I want to implement a divider-by-4.5 frequency divider.
Thanks.
I agreed the input referred current noise is In,in^2 = IRD^2 = 4KT/RD, and Rg should NOT contribute to any current noise.
It is because when we are finding the current noise, we let the input (source in this case) open circuit. As the source is floating in small signal, whatever change on the...
sigma delta modulator, which controls the frequency divider ratio, would shape the noise to high frequency. PLL, being a low pass filter loop, can remove the noise at high frequency. As a result, sigma delta PLL is superior at the noise performance.
non-ideality factor diode
Does anyone know what's the parameter name of the non-ideality factor in a varactor diode model? I thought it is NDIODE=1, but I tried changing the value and causing no effects. Thank you very much.
ft fmax definition
I found the proof of the relationship of two definitions for fT:
1. fT = gm/(2*pi*Cin)
2. ft = 1/(2*pi*tau)
The answer is on the page 7 of the document:
**broken link removed**
And now I think transconductance gm is about constant until the frequency reaches...
fmax mosfet
I actually saw the answers to some of my questiosn from Tom Lee's book:
Q1: max oscillation frequency fMAX is the frequency when PL / Pin = 1.
Q4: the relationship between fMAX and fT is derived in Tom Lee's book, page 178.
I am still not sure Q2 and Q3. Especially, I want to...
I have a few questions about fMAX and fT of a MOSFET:
1. What's the definitation of fMAX, the maximum oscillation frequency of a MOSFET?
2. I remember the definition of cut-off frequency fT is the frequency when current gain Iout/Iin = 1. This gives out fT = gm/Cg. My question is: is...
In MOSCAP, gate capacitance is a function of gate voltage bias Vgs.
Even in CMOS transistor, gate capacitance is also depending on Vgs. Because total gate capacitance is composed of overlap capacitance with drain/source, and channel capacitance. Overlap capacitance is constant, but channel...
Re: Problem on D-type latch
The Q and Q' curves suggests Q stays high longer than the midway, switching voltage Vm is higher than Vdd/2. This can be caused by the fact that in the ouptut inverter stages, PMOS is stronger than the NMOS.
Again, 50% duty cycle or not depends on the application...
But in most situations, I don't think it matters. For static frequency divider, the thing we concern is the rising edge or falling edge, not the duty cycle.
Re: Two capacitor in series
The left capacitor was floating because the switch was open, then no charge can be accumlated on this capacitor. Think in this way, when you try to put positive charge on the top plate, the same amount of negative charge has to be on the bottom plate... but there is...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
