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Hi Guys,
Can somebody tell me how to add formula in LVS command file to check the resistor value, for example, I spec the resistor value in the CDL nelist, and I give the squar resistance in the LVS command file: PARAMETER RES[RA] 1k, but I need this formula R=1k*[L-0.5]/[W+0.5] to calculate...
Dear vbhupendra,
Following is some part of the input-layer in LVS command file, it is a bipolar process, layer 101 is defined in my techfile as a text layer.
NP = 1
ISO = 6
B = 7
E = 11
C = 13
TH = 15
SM = 16
M = 14 TEXT = 101 ATTACH = M
;;;;;;;;;TEXT = 101 attach= M
SUBSTRATE...
I am using PDRACULA, and I only draw 2 BJT in the layout, for each pin of the schematic, I only put text in the layout, and I don't know how to put pin in the layout.
Hi Guys,
Why the PDRACULA says : ** NOTE : NO OUTPUT NEEDED SO SETTING SUMMARY-ONLY=YES FOR THIS RUN ONLY
Thanks a lot
Jay
:/g testa.rul
:/f
** NOTE : DEFAULTING CNAMES-CSEN TO "NO" WHEN SYSTEM=GDS2
** NOTE : NO OUTPUT NEEDED SO SETTING SUMMARY-ONLY=YES FOR THIS RUN ONLY
** CREATING...
I have used the CPOINT-FILE=cp.txt,
cp.txt:
VCC vcc!
GND gnd!
A A
B B
Why the LVS result says the layout node name VCC, GND, A, B are illegal?
Best Regards
Jay
Hi Guys,
Can somebody tell me how to solve this LVS error? Following is the error listed in the LVS result file.
*/W* WARNING: NO POWER ON LAYOUT SIDE
*/W* WARNING: THEN THE POWER NODE MAY BE ASSIGNED DIFFERENT SCHEMATIC NAME.
*/W* WARNING: NO GROUND ON LAYOUT SIDE
*/W* WARNING: THEN...
.cdl file lvs
Hi Guys,
Can anybody tell me that how to write the command in LVS rule file for relating the devices of CDL and Layout, for example, if I define an element BJT[VN] in the rule, and I want to relate it with the a vertical NPN in CDL which model name is VNPN1, then how to write for...
Hi guys,
Can anybody tell me why we need dummy resistors?
If I want to well-match R0 R1, and R0, R1 should be some matched to R3. Which way is better:
(a) dummy R3 R0 R1 dummy
(b) R3 dummy R0 R1 dummy
Regards
ic layout grid
Does the bipolar process has no the grid spec? I can not find any spec of manufature grid in the material from the foundry.
Regards
Jay
Added after 19 minutes:
Do the scale and resolution in the DRC and LVS mean the manufature grip?
Have nice days
Dear YESH_23,
Would you pls tell me what the "PDK" means?
And I can not find any minimum grid spec from thr foundry for our bipolar process.
Best Regards
Jay
pipo.log
Hi guys,
Do anybody know the meaning of this warning, is it important?
WARNING (157): Years in non-standard two-digit format encountered in the Stream file.
Best Regards
Jay
Dear Sunking,
Thank you so much, sholud I spec the layer rule(which includes a manufacture grid definition) in the techfile? And How can I set the minmum grip in the layout drawing?
Best Regards
Jay
Halo guys
I am begining for a layout, but I have no experience for it, I am afaind that if I didn't set up the supporting files properly for layout, I may have to restart again after I finish the first layout, so can anybody tell me that what I need to set up before the layout, mostly I need a...
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