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hi all,
i want to use pmos as a switch , when the gate voltage is 0, the switch is closed, when the gate voltage is 1, the switch is open.
however, when i really implement it in hspice, it cant function as a switch, even i applied high voltage to the gate, but it cant block the current...
Hi all,
originally i used one switch to make my boost converter ( below pic)
however the efficiency is too low because of the diode voltage drop, so i used a pmos to replace it
but afterwards the current becomes so low , the current waveform of PMOS switch is attached, the current range...
hi all,
i am trying to use a SR latch and two 3-input NAND gates to implement a JK flip-flop
i tested SR latch and the nand gate separately, they all function well
but when i combine them into a JK flip flop, it cant work
the simulation graph is attached (j and k are equal to vdd) , i dont...
hi all,
ring oscillator is a very simple design and i can implement properly in Spectre, however, when i move the whole thing to HSPICE, it doesnt work, i checked my NAND gate and inverter, they are all functional.
hi all,
i am currently working on a project which is about LED driver for electric torch, it's very common that we use battery supply in this application, and in my project i chose to use a 2A chargeable battery...
but when i am designing the feedback for the driver, i use 3V- 0 range for all...
the original PMOS does have 20u current flow but the next PMOS is in linear and its current is extremely small
i cant get why
- - - Updated - - -
yes, it does work well, i just forgot to set the initial value in my HSPICE
hi all,
i attempt to use a PMOS current mirror to charge up a capacitor, i can generate a 20u current but cannot copy it to the next pmos therefore cannot charge the capacitor....
actually how to use a current mirror to charge up a cap? i am thinking if it's too simple to just connect the pmos...
hmmm, i tested this part before and the result is ok, just larger delay time
i get confused about the voltage results of two comparators now... i ONLY simulated the cmp + RS latch, VH= 1.3 and VL = 1.1, it didnt have any problem. but it goes very abnormal when i simulate the whole circuit, it...
oh, thanks, this problem is fixed, two amps and the latch can collaborate properly now
but then i encounter another problem when i simulate the whole circuit:
the range of the comparator is from 1.5 V to -1.5V, i set VH= 1.3, VL = 1.1, but it turns out the vramp keeps on staying at 1.5V...
my generator doesnt work so i checked every part of my circuit
the NAND RS latch can work properly when i just test the latch. but when it collaborates with two non-inverting amplifiers, it functions as a NOR latch. it's very strange but it may not be an issue if i just treat the amp + latch as...
Anyone knows this RC oscillator topology?
hi all,
i am trying to generate clk and ramp signals by implementing this RC oscillator, but i don't know much about this topology, anyone can tell me more about it? thanks
hi all, i am currently designing an oscillator for my boost converter and now i encounter some problems when i try to make a RC oscillator which is supposed to generate ramp and clk
i tested the RS latch and two amplifiers before i design the whole circuit , attempt to make sure if this part...
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