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Recent content by godsun

  1. G

    what is the feature size, gate length or gate pitch?

    gate pitch i thought it is length size of gate。 but someone told me it is half pitch recently intel's 65nm tech, effect gate length is 35nm, gate pitch is 220nm and half pitch is 220/2 = 110? i confused and don't know which one is correct
  2. G

    what is the effect to chip if latency is high!

    thank, i know, but i have not understand that what is related to latency. chip will have a slow reset?
  3. G

    simvision and SDF file

    look nc-sim user mannual and search “sdf", there is some command which open and read you sdf file.
  4. G

    what is the effect to chip if latency is high!

    high latency mean long delay ? then which will result in low frequency, isn't it?
  5. G

    who can shall some experience of Power on reset?

    i know that most power on reset circuit is RC+Schmitt-trigger but assume RC delay is 1s, Vcc stable is 10s, but one glitch happened and it is 100ms then it is not long enough for RC discharge ,which will result in reset not active and meta state of system . how to avoid it? only choice RC...
  6. G

    who can give a overview of IP market

    soc is hot now, but how about IP market? because of less than standard of IP specification, it is different for IP reuse. what shall i do?
  7. G

    what is the difference of Registerfile and SRAM?

    registerfile is faster than SRAM and more power consuption, i don't know why it is seem that they are same timing... Registerfile = control logic + SRAM ???
  8. G

    a question about power compiler!

    now i am estimating and analyzing power of ASIC with power compiler of synopsy tools, but there are some question: 1, what is the relation of forward saif and back saif? forward saif is generate by lib2saif, but there are sereval simulation lib and which one should be used for...
  9. G

    can DC eat tcl under linux shell?????

    Thanks , DC support parameter -f like ncsim , i should have a try and then post next time :-(
  10. G

    can DC eat tcl under linux shell?????

    Not run my tcl under dc_shell-t envirment, but run script under linux bash shell like "ncverilog -f my.f" format . who know that? what can i do? thank you.
  11. G

    why does a chip need the power supply of 3.3v and 2.5v

    different region have different voltage and 1 or 0 is different voltage in different region and there is a convert different region, we know Multi-voltage is more complex but save more power in high speed chip
  12. G

    why EDA company develop a compatible OS with linux company?

    most eda tool running under Linux platform is more fast than Solaris and linux server is more cheaper than sun or hp server, so there are more and more company choose Linux platform in the future, why EDA company port tools from sparc to linux????? low profit??? we know most eda tool work...
  13. G

    Help me with implementing ahb arbiter

    Re: help for ahb arbiter yeah synopsys dw support amba spec, but it is IP and be encrypt synopsys edatool is coreConsultant, it can generate AHB module
  14. G

    help Back end digital ASIC design

    MPW is cheap much more than Single chip Wafer. because several company can share one wafer
  15. G

    what is hot-topic in digital design now?

    embed ic and mcu will profit from the market still
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