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I am using Microchip Libero SOC to process the incoming data using Verilog.
But I found out the Verilog signed math operation is not correct, such as "01a114" + "ff6a1d" should = 010b31, but the result is "000b31"
Please let me know how to fix this problem.
Many thanks in advance.
Please help for the following Verilog problem.
I am writing the Butterfly combination math function of FFT.
The problem I am meeting is the FFT result array is skipped every two space.
Please let me know any protentional reasons for my problems.
Many thanks in advance.
Any helps for the following Verilog coding are appreciated.
Pulsewidth module is instantiated in top_pll module and the data port will be transferred from pulsewidth module to top_pll module for further processing.
I have defined the data port in pulsewidth module with r_count_hi (define as...
Sincere thanks for your answers.
I originally plan to use 74ACT04 since it has higher output current but there is no model for 74ACT04 in TINA so I have to use 74HCT04 model instead.
If it is possible would you show your simplified level shift circuit?
One more question:
When T3 is connected...
I try using this circuit to switch 0.2V and 0V to output.
The first NPN and PNP for realizing the control level shift to compensate the Vbe of second PNP.
How do you think this circuit?
I have run TINA and it can work but not sure if it still can work in real world.
Many thanks in advance.
You mean those 10K resistors are for making smooth edge?
Thank you for your answers.
---------- Post added at 13:43 ---------- Previous post was at 13:42 ----------
Just like High pass filter?
I used the structure in attached image to generate voltage swing from +5V to -5V.
But why the simulation results can not reach +5V and -5V.
Which parameters determinate the voltage swing, is it Darin to Source voltage?
Many thanks.
It has to be a positive power supply that has variable output 2v to 15v and but can sink up to 2A
It is hard to find one meet this requirements.
Thanks.
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