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Recent content by dig_des

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    Solution manual of Probability and Random Processes for Electrical Engineering

    Re: Solution Manual Can you guys give the exact link?
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    sdf generated by Astro and PT,any difference?

    Typically there should be no differences except few syntax. But people generally use PT generated as it accounts SI effects.
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    MS/MTech after 3 yrs exp

    It really depends on your circumstances. If you just want to live with whatever you are doing now, there in no need to go for further studies. You can always get promotion once in every 3-4 years if you work consistenly. But MS/Phd is a must If you want to generate new ideas, model new...
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    Principles of Computer Architecture: class test edition, 1999

    Re: Solution Why did you mentioned it "solution"? And please give accurate details when you upload it to edaboard.
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    Digital system testing project topic.

    You can consider implementing some of the test algorithms like PODEM/FAN in C++/Java. This could be a least expensive project. Refer to Electronic testing by Bushnell.
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    Problem with code for submodule which generates clocks for other submodules

    Re: synthesize problem Or wherever "module up" is instantiated in your system, it's indata[0] bit is driven by "0" or it might be floating. That could be another reason for your outdata[0] being tied to 0 after synthesis. Check the instantiation of module "up".
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    Problem with code for submodule which generates clocks for other submodules

    Re: synthesize problem Can you try this code? always @(posedge clk) if(!rst) outdata<=16'b0; else outdata<=indata;
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    solution manual from Introduction to antenna theory

    what is the password?
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    AC scan techniques in the latest process technologies

    I couldn't find a thread on Ac scan. I welcome the interested members to discuss emerging Ac scan techniques in the latest process technologies (65nm, 45nm, 55nm etc). Proposed topics for discusion:- 1. Different tools that are matured to handle Ac scan (transition & path delay) patterns...
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    Electronics Exercises!

    Message is unavailable.
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    Who has the homework for BERKELEY EE231?

    I think you misunderstood my point. Well, I also like solution manuals, and request the members of the forum to post the solutions of each and every book. But when posting solution manuals is not a problem, why requesting help for homework is a problem to somebody in the forum?? If somebody...
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    Who has the homework for BERKELEY EE231?

    True, I 100% agree with the view that everybody should do his own homework. But why so many solution manuals are posted in this site? It is not appropriate to post the Sol. man. right?
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    solutions for cmos vlsi design(neil weste,3rd edition)

    cmos vlsi solutions Look at this. Some what older though.
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    ATPG issue with testbench of STIL format

    Re: ATPG issue 2 Can you check your load_unload procedure and confirm that the capture clocks are indeed declared there?
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    [SOLVED] All Interview Questions - Open Thread - Please Contribute

    interviw questions for 8051 microprocessor 1. How do you implement a 256x8 RAM using 2 128X8 RAMs. 2. How do you implement a given comb. ckt using only NAND or NOR gates.
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